This application claims the benefit of Korean Patent Application No. 1999-31744, filed on Aug. 2, 1999, under 35 U.S.C. xc2xa7 119, the entirety of which is hereby incorporated by reference.
1. Field of the Invention
The present invention relates to a liquid crystal display device and a method of manufacturing the same.
2. Description of Related Art
In general, LCD devices have various advantages that they are thin in thickness and low in power consumption, and so on, in comparison with CRT (cathode ray tube) display devices. Therefore, such LCD devices might be expected to be substituted for CRT display devices and have been a matter of great interest in some industry fields.
A typical LCD device includes a liquid crystal panel and a back light device. The liquid crystal panel includes upper and lower substrates with a liquid crystal layer interposed therebetween. The upper substrate has a color filter, and the lower substrate has a thin film transistor (TFT) as a switching element. An upper polarizer is arranged on the upper substrate of the liquid crystal panel, and a lower polarizer is arranged between the lower substrate of the liquid crystal panel and the backlight device.
FIG. 1 is a plan view illustrating a portion of a conventional liquid crystal display (LCD) device corresponding to one pixel. As shown in FIG. 1, the lower substrate includes gate lines 6 and 8 arranged in a transverse direction, data lines 2 and 4 arranged in a longitudinal direction perpendicular to the gate lines 6 and 8, and thin film transistors xe2x80x9cTxe2x80x9d (TFTs) formed near the cross point of the gate and data lines 2 and 8. Each of the TFTs xe2x80x9cTxe2x80x9d has a gate electrode 18, a source electrode 12 and a drain electrode 14. The gate electrode 18 is extended from the gate line 8, and the source electrode 12 is extended from the data line 12 and spaced apart from the drain electrode 14. The lower substrate further includes a pixel electrode 10 formed on a region defined by the gate lines 6 and 8 and the data lines 2 and 4. The pixel electrode 10 is electrically connected with the drain electrode 14 through a contact hole (not shown) and is usually made of a transparent conductive material such as indium tin oxide (ITO) and indium zinc oxide (IZO).
FIG. 2 is a cross sectional view taken along linexe2x80x94of FIG. 1. As shown in FIG. 2, a gate insulating layer 20 is formed on the substrate 1, and the data line 2 is formed on the gate insulating layer 20. A passavation film 22 is formed on the exposed surface of the gate insulating layer 20 while covering the data line 2. The pixel electrodes 10 are spaced apart from each other. This is to prevent a cross talk due to an electric field generated around the data line when electrical signals are applied to the data line. In other words, the data line 2 is located at a distance of xcex94L from the pixel electrode 10.
The conventional LCD device having such a structure can reduce an affection of the cross talk, but has a disadvantage that an aperture ratio is reduced as long as xcex94L plus an alignment margin because a black matrix has to cover a portion of xcex94L.
In order to overcome such a problem, an another conventional LCD device having a structure shown in FIG. 3 is introduced. The two adjacent pixel electrodes 30 overlap both end portions of the data line 2, respectively. Thus, because the black matrix needs not be arranged to cover a portion in which the pixel electrodes 30 are distant from the data line 2, the LCD device can have a high aperture ratio.
However, a parasitic capacitor may be formed vertically between the pixel electrode 30 and the data line 2, leading to causing a cross talk. As the parasitic capacitance xe2x80x9cCdpxe2x80x9d between the pixel electrode 30 and the data line 2 increases, display distortion due to a cross talk gets worse. In addition, when the step and repeat method type exposure is employed in manufacturing process of the LCD device, because the mask having the same pattern is used several times during one process, an alignment error of about 0.4 xcexcm to about 0.5 xcexcm may occurs centering on an imaginary boundary line between adjacent two portions to be exposed to light. Due to an alignment error, areas of the parasitic capacitors may become to differ and thus a capacitance difference may occur between the adjacent two parasitic capacitors. Such a capacitance difference affects brightness and a display distortion may be displayed near the imaginary boundary line between adjacent two portions to be exposed to light.
Such a capacitance of the parasitic capacitor depends on a vertical distance between the pixel electrode 30 and the data line 2. In other words, as a vertical distance between the pixel electrode 30 and the data line 2 become large, the capacitance of the parasitic capacitor becomes small.
FIG. 4 is a plan view illustrating an another conventional LCD device disclosed in Japanese Patent Application No. 10-274782. The LCD device is also introduced to prevent such a cross talk. FIG. 4 is a cross sectional view taken along linexe2x80x94of FIG. 4, and FIG. 6 is a cross sectional view taken along linexe2x80x94of FIG. 4. As shown in FIG. 4, the conventional LCD device includes a gate line 50 arranged in a transverse direction, a data line 60 arranged in a longitudinal direction perpendicular to the gate line 50, and thin film transistors 74 (TFTs) formed near the cross point of the gate and data lines 50 and 60. Each of the TFTs xe2x80x9cTxe2x80x9d has a gate electrode 51, a source electrode 61, and a drain electrode 63. The gate electrode 51 is extended from the gate line 50, and the source electrode 61 is extended from the data line 60 and spaced apart from the drain electrode 63. The conventional LCD device further includes a pixel electrode 70 formed on a region defined by the gate line 50 and the data line 60. The pixel electrode 70 is electrically connected with the drain electrode 63 through a contact hole 67. At this point, except for a cross portion of the data line 60 and the gate line 50, the data line 60 is formed directly on the substrate 1.
Method of manufacturing the conventional LCD device described above is as follows. As shown in FIG. 5, a gate insulating layer 20 is formed on the substrate 1, and a portion 72 of the gate insulating layer 20 that the data line 60 will be formed is etched, except for a cross portion of the gate line 50 and the data line 60. Then, the data line 60 is formed at the portion 72 and the passivation film 22 is formed covering the data line 60 and the gate insulating layer 20. The pixel electrode 70 is formed on the passivation film 22, overlapping a portion of the passivation film 22 corresponding to an end portion of the data line 60. The tow adjacent pixel electrodes 70 are spaced apart from each other. In other words, a spaced distance between the adjacent two pixel electrode 30 is narrower than a width of the data line 72.
Since such a structure can have a lengthy vertical distance between the pixel electrode 70 and the data line 60, a capacitance of a parasitic capacitor vertically formed between the pixel electrode 70 and the data line 60 can be reduced effectively, leading to reducing an affection of a cross talk. In other words, since a portion 72 of the gate insulating layer 20 is etched and thus the data line 60 is formed directly on the substrate 1, a thickness of the passivation film 22 over the data line 60 can increase as much as a thickness of the gate insulating layer 20. Therefore, the capacitance of a parasitic capacitor can be reduced. For example, if a thickness of the gate insulating layer 20 and a vertical distance between the substrate 1 and the pixel electrode 70 are 3000 and 5000 angstrom, respectively, the parasitic capacitance of 60% can be reduced.
However, the conventional LCD device having such a structure requires an additional process that etches a portion 72 of the gate insulating layer 20 that the data line 60 is formed directly on the substrate 1, leading to a lengthy processing time. Besides, as shown in FIG. 6, since a portion of the gate insulating layer 20 corresponding to the cross portion of the gate line 50 and the data line 60 is not etched, the data line 60 gets to have step portions xe2x80x9cAxe2x80x9d at a location corresponding to both end portions of the gate insulating layer 20 that is etched. Therefore, a line defect such as a line open of the data line 60 may occur at step portion xe2x80x9cAxe2x80x9d.
To overcome the problems described above, preferred embodiments of the present invention provide a liquid crystal display device having good display characteristics and a short processing time.
In order to achieve the above object, in an aspect, a liquid crystal display device according to a preferred embodiment of the present invention includes a first insulating substrate and a second substrate with a liquid crystal layer interposed therebetween the second insulating layer includes a color filter the first insulating substrate includes a buffer layer formed on the first substrate and an inter-layer insulating film formed on the buffer layer. The inter-layer insulating film has an etching portion. The etching portion is etched. The first substrate further includes a semiconductor island. The semiconductor island is formed on a portion of the buffer layer corresponding to the etching portion. The first substrate further includes data lines formed on the semiconductor island and gate lines arranged in a direction perpendicular to the data lines. The first substrate further includes switching elements arranged near cross points of the gate and data lines. Each of the switching element having a gate electrode, a source electrode and a drain electrode. The gate electrode extends from the gate line, and the source electrode extends from the data line. The first substrate further includes pixel electrodes formed on a region defined by the gate and data lines. The pixel electrode connects with the drain electrode. The pixel electrode overlaps an end portion of the data line and the adjacent two pixel electrodes are spaced apart from each other.
The semiconductor island has a length and a width greater than the etching portion. Or the semiconductor island has a length and a width smaller than the etching portion. The switching element is a polysilicon thin film transistor. The semiconductor island is a polysilicon layer.
In another aspect, a liquid crystal display device according to the preferred embodiment of the present invention includes a first insulating substrate and a second insulating substrate with a liquid crystal layer interposed therebetween the second insulating substrate includes a color filter. The first substrate includes a buffer layer formed on the first substrate and an inter-layer insulating film formed on the buffer layer. The inter-layer insulating film has an etching portion. The etching portion is etched. The first substrate further includes data lines formed on the semiconductor island and gate lines arranged in a direction perpendicular to the data lines and switching elements arranged near cross points of the gate and data lines. Each of the switching element has a gate electrode, a source electrode and a drain electrode. The gate electrode extends from the gate line and the source electrode extends from the data line. The first substrate further includes pixel electrodes formed on a region defined by the gate and data lines. The pixel electrode connects with the drain electrode. The pixel electrode overlaps over an end portion of the data line and the adjacent two pixel electrodes are spaced apart from each other. At this point, both end portions of the etching portion adjacent to the cross potion of the gate and data lines has a greater length than its width. The first insulating substrate further includes semiconductor islands formed on portions of the buffer layer corresponding to the both end portions of the etching portion.
In another aspect, a method of manufacturing a liquid crystal display device according to the preferred embodiment of the present invention includes forming a buffer layer on a substrate; forming a semiconductor island and an active area on the buffer layer; forming sequentially a gate electrode and a gate insulating layer on the active area; ion-doping the active area using the gate electrode as a mask to form source and drain regions; depositing an inter-layer insulating film over the whole surface of the substrate and covering the semiconductor layer and the active area and the gate electrode; forming simultaneously an etching portion and source and first drain contact holes, the etching portion located a location corresponding to the semiconductor island, the source and first drain contact hole located on the source and drain regions, respectively; forming a data line on the semiconductor island, a source electrode, and a drain electrode, the source electrode electrically connecting with the source region through the source contact hole, the drain electrode electrically connecting with the drain region through the first drain contact hole; forming a passivation film over the whole surface of the substrate and covering the data line and the source and drain electrode, the passivation film having a second drain contact hole on a portion of the drain electrode; and forming a pixel electrode on the passivation film, the pixel electrode electrically connecting with the drain electrode through the second drain contact hole.
The passivation film is made of benzocyclobutent (BCB). The semiconductor island and the active area are a polysilicon layer.
As described herein before, the method of manufacturing the LCD device according to the preferred embodiment of the present invention has the following advantages. Firstly, by using the semiconductor island as an etch stopper when the inter-layer insulating film is etch to form the etching portion, a line open of the data line due to a step difference can be prevented. Secondly, since the data line is formed on the etching portion and thus a vertical distance between the pixel electrode and the data line increase, a capacitance of the parasitic capacitance vertically formed between the pixel electrode and the data line can be reduced, whereupon an affection of the cross talk can be reduced remarkably. Thirdly, a length of the two end portions of the etching portion adjacent to the cross portion of the gate and data lines have a protruding or a recess portion and thus is greater than its width, a step difference of the two end portion of the etching portion adjacent to the cross portion of the gate and data lines can be reduced. Fourthly, since the etching portion is formed at the same time as the source and drain contact holes, an additional process is not required. Fifthly, since a capacitance of the parasitic capacitor vertically formed between the pixel electrode and the data line is sufficiently small not to affect the display characteristics, regardless of the capacitance of the parasitic capacitor, the display characteristics can be improved.